team开了一个职缺给快要毕业的新鲜人
有兴趣的朋友可以把履历寄过来
老板说暂时不考虑有经验的
focus on flash memory full chip verification
※ 引述《JasonZZZ (吃吃吃)》之铭言：
: Hi everyone,
: We plan to hire 2 new college graduates in this position.
: Please send your or your friends' resumes to chih-hao.yu@sandisk.com
: Thanks
: Job Title: Design Verification Engineer – NCG
: Job Description:
: In this position, the individual will participate in the logic design and verification of NAND Flash memory products.
: Responsibilities include:
: ‧ RTL and Gate level design verification.
: ‧ Development of test bench using Verilog/SystemVerilog.
: ‧ Development of behavioral models with object oriented language in C++/SystemC.
: ‧ Evaluation and support of digital simulation tools/flows on design methodology.
: ‧ Development of assertions in SystemVerilog.
: Job Qualification:
: NCG with one of following qualifications:
: ‧ MS EE with logic design Verilog RTL focus; as well as C++ knowledge
: ‧ MS CS/CE with strong C++ skills; as well as knowledge in Verilog & logic design
: Job Location: US-Milpitas CA